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GENLINX TMII GS9024
Automatic Cable Equalizer
DATA SHEET FEATURES * automatic cable equalization * fully compatible with SMPTE 259M * typically equalizes greater than 350m of high quality cable at 270Mb/s * signal strength indicator * output data muting when input data is lost * output 'eye' monitor (OEM) with large signal amplitude and power down option * low power: 240mW at 5V * 14 pin SOIC package * programmable output data squelch for max cable length limiting * carrier detect with programmable threshold level * serial data output "High Z" select to allow muxing of EQ inputs APPLICATIONS Front-end cable equalization for digital video systems; Input equalization for serial digital distribution amplifiers, routers, production switchers and other receiving equipment. DESCRIPTION The GS9024 is a high performance automatic cable equalizer designed for serial digital data rates from 143Mb/s to 540Mb/s. The GS9024 receives either single-ended or differential serial data and outputs equalized differential signals at PECL levels (800mV). The GS9024 provides up to 40dB of gain at 200MHz which will typically result in equalization of greater than 350m at 270Mb/s of Belden 8281 cable. The GS9024 incorporates an analog signal strength indicator/carrier detect (SSI/CD) output indicating both the presence of a carrier and the amount of equalization applied to the signal. Optional external resistors allow the carrier detect threshold level to be customized to the user's requirement. The GS9024 also features selectable High Z serial data outputs eliminating the need for input muxing circuitry in routers. In addition, the GS9024 provides an 'Output Eye Monitor' (OEM) which allows the verification of signal integrity after equalization, prior to reslicing. The GS9024 operates from a single +5V or -5V power supply and consumes only 240mW of power. Packaged in a small 14 pin SOIC, the GS9024 is ideal for router applications where high density component placement is required. ORDERING INFORMATION
PART NUMBER GS9024-CKB GS9024-CTB PACKAGE 14 pin SOIC 14 pin SOIC Tape TEMPERATURE 0C to 70C 0C to 70C
GS9024
SDI
+ -
VARIABLE GAIN EQ STAGE
+ + -
SDO SDO HIGH Z
SDI
OEM
EYE MONITOR
AUTO EQ CONTROL
SSI/CD
+ AGC
CD_ADJ
BLOCK DIAGRAM
Revision Date: November 2000 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com Document No. 521 - 70 - 06
ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage Input Voltage Range (any input) Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10 sec) VALUE 5.5V VCC +0.5 to VEE -0.5V 0C TA 70C
GS9024
-65C TS 150C 260C
DC ELECTRICAL CHARACTERISTICS
VCC = 5V, VEE = 0V, TA = 0C TO 70C unless otherwise shown.
PARAMETER Supply Voltage Power Consumption
SYMBOL VCC PD
CONDITIONS
MIN 4.75 -
TYP 5.0
1
MAX 5.25 -
UNITS V mW mW mA mA mA V
NOTES
TEST LEVEL
240 340 44 58 11 2.5
3 3 1 1 3 1
with OEM active Supply Current S with OEM active Serial Data O/P Current SDI/SDI Common Mode Voltage AGC+/AGC- Mode Voltage OEM Bias Potential SSI/CD Output Current SOURCE CLMAX = 50pF RL = CLMAX = 50pF RL = 5k SINK High Z Input Voltage VHIGH VLOW TEST LEVELS 1. 100% tested at 25C. 2. Guaranteed by design. 3. Inferred or co-related value. SDO RL = 75
-
-
2.7
-
V
1
2.4 NOTES
4.5 1.0 -
18 110 1.5 0.8
V A A mA V V
1
1 1
1. Typical values are parametric norms at 25C.
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AC ELECTRICAL CHARACTERISTICS
VCC = 5V, VEE = 0V, TA = 0C TO 70C unless otherwise shown.
PARAMETER Data Rate Output Signal Swing Additive Jitter
SYMBOL
CONDITIONS
MIN 143
TYP -
1
MAX 540 1000 -
UNITS Mb/s mV ps p-p ps p-p ns
NOTES
TEST LEVEL 1 1
VSDO
RL = 75 270Mb/s, 300m 540Mb/s, 100m
700 0.5
850 275 200 0.65
GS9024
tJ
see Fig 5
5 5 3
Output Rise and Fall Times (20-80%) Output Duty Cycle Distortion Input Resistance Input Capacitance Carrier Detect Response Time
tr, tf
-
30
-
ps
2
RIN CIN
SDI, SDI SDI, SDI Carrier Applied RL = CL 50pF on SSI/CD
-
10 1.0 3
-
k pF s
2 2 2
tCDON tCDOFF
, ,
-
Carrier Removed RL = CL 50pF on SSI/CD
-
30
-
s
2
High Z Response Time Input Return Loss Maximum Equalizer Gain TEST LEVELS 1. 100% tested at 25C. 2. Guaranteed by design.
trHIGHZ
at 270MHz AEQ at 200MHz
15 -
17 20 40
-
ns dB dB see Fig 8 see Fig 4
2 3 3, 5
NOTES 4. Evaluated using test setup Figure 1. 5. Evaluated using test setup Figure 2. 1. Typical values are parametric norms at 25C.
3. Inferred or co-related value.
TEST SETUP
DATA TEKTRONIX GigaBERT 700 TRANSMITTER DATA GS9028 CABLE DRIVER BELDEN 8281 CABLE
EB9024 BOARD
TEKTRONIX GigaBERT 700 ANALYZER TRIGGER
CLOCK
Fig. 1 Test Setup for Figure 3.
BELDEN 8281 CABLE GS9028 CABLE DRIVER EB9024 BOARD VERTICAL IN
DATA ANRITSU DATA ME522A or GigaBERT 700 TRANSMITTER CLOCK
SSI/CD V
V CD_ADJ OSCILLOSCOPE
TRIGGER IN
Fig. 2 Test Setup for Figures 4, 5, 6, 7, 10 and 11.
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PIN CONNECTIONS
AGCVEE VCC SDI SDI VEE VCC
1 2 3
14 13 12
AGC+ HIGH Z SSI/CD SDO
GS9024 11 4 TOP VIEW 5 10 6 7 9 8
GS9024
SDO CD_ADJ OEM
PIN DESCRIPTIONS
NUMBER 1, 14 4, 5 8 SYMBOL AGC-, AGC+ SDI/SDI OEM TYPE I I O External AGC capacitor. Differential serial digital data inputs. Output `Eye' monitor. OEM is a single ended current mode output and requires an external 50 pullup resistor. Carrier detect threshold adjust. Equalized serial digital data outputs. Signal strength indicator/Carrier Detect. The SDO/SDO outputs are High Z when this pin is HIGH. If High Z functionality is not used, this input can be left floating or tied LOW. DESCRIPTION
9 10, 11 12 13
CD_ADJ SDO/SDO SSI/CD HIGH Z
I O O I
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TYPICAL PERFORMANCE CURVES (VS = 5V, TA = 25C unless otherwise shown.)
500 0.5 UI Output Additive Jitter
5.00
400
4.50
SSI/CD OUTPUT VOLTAGE (V)
CABLE LENGTH (m)
300 0.2 UI Output Additive Jitter
4.00
GS9024
200
3.50
100
3.00
0 90
2.50
180
270
360
450
540
630
0
50
100
150
200
250
300
350
400
450
500
DATA RATE (Mb/s)
CABLE LENGTH (m)
Fig. 3 Maximum Data Rate vs. Cable Length - Belden 8281n (see Test Setup in Figure 1)
50 45 40 35 30
Fig. 6 SSI/CD Voltage vs. Cable Length - Belden 8281 (CD_ADJ = 0V)
5.0
4.5
CD_ADJ VOLTAGE (V)
4.0
GAIN (dB)
25 20 15 10 5 0 1 10 100 1000
3.5
3.0
2.5 2.0 200
250
300
350
400
FREQUENCY (MHz)
CABLE LENGTH (m)
Fig. 4 Equalizer Gain vs. Frequency
Fig. 7 Carrier Detect Adjust Voltage Threshold Characteristics
j1
1500 1400 1200
j0.5
j2
ADDITIVE JITTER (ps p-p)
1000 800 600 540Mb/s 400 200 270Mb/s 0
j0.2
j5
3000 -j0.2 1620 810
720
-j5
0
50
100
150
200
250
300
350
CABLE LENGTH (m)
-j0.5 -j1
-j2
Fig. 5 Additive Jitter vs. Input Cable Length - Belden 8281
Frequencies in MHz, impedances normalized to 50.
Fig. 8 Input Impedance
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variation of the inverse cable loss characteristic with cable length. The gain stage provides up to 40dB of gain at 200MHz which will typically result in equalization of greater than 350m at 270Mb/s of Belden 8281 cable. The edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. This error signal is integrated by an external differential AGC filter capacitor (AGC+/AGC-) providing a steady control voltage for the gain stage. As the frequency response of the gain stage is automatically varied by the application of negative feedback, the edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. The equalized signal is DC restored, thereby restoring its logic threshold to its corrective level regardless of shifts due to AC coupling. The digital output signals have PECL voltage levels (800mV) and are available at pins SDO and SDO.
1. OUTPUT HIGH Z
GS9024
Fig. 9 Output Data Waveform at 270Mb/s, 300m
A HIGH Z pin allows the data outputs to be put into a high impedance state which disconnects them from the output traces. This feature is ideal for input expansion in router applications as it eliminates the need for input muxes or crosspoints.
2. SIGNAL STRENGTH INDICATION/CARRIER DETECT
The GS9024 incorporates an analog signal strength indicator/carrier detect output (SSI/CD) which indicates both the presence of a carrier and the amount of equalization applied to the signal. The voltage output of this pin versus cable length (signal strength) is shown in Figure 11. With 0m of cable (800mV input signal levels), the SSI/CD output voltage is approximately 4.5V. As the cable length increases, the SSI/CD voltage decreases linearly providing accurate correlation between the SSI/CD voltage and cable length.
Fig. 10 Output Data Waveform at 540Mb/s, 200m
DETAILED DESCRIPTION The GS9024 Automatic Cable Equalizer is a bipolar integrated circuit designed to equalize serial digital data signals between 30Mbps and 622Mbps. Powered from a single +5V or -5V supply, the device consumes approximately 240mW of power. The serial data signal is connected to the input pins (SDI/SDI) either differentially or single ended. The input signal passes through a variable gain equalizing stage whose frequency response closely matches the inverse cable loss characteristic. In addition, the variation of the frequency response with control voltage imitates the 6
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When the signal strength decreases to the level set at the "Carrier Detect Threshold Adjust" pin, the SSI/CD voltage goes to a logic "0" state (0.8V) and can be used to drive other TTL/CMOS compatible logic inputs. In addition, when loss of carrier is detected the SDO/SDO outputs are muted (set to a known static state).
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5. I/O DESCRIPTION
5
5.1. High Speed Analog Inputs (SDI/SDI)
SSI/CD OUTPUT VOLTAGE (V)
4
SDI/SDI are high impedance inputs differential or single-ended input drive.
CD_ADJ CONTROL RANGE
which
accept
3
2
Figure 12 shows the recommended interface when a singleended serial digital signal is used.
GS9024
1
10nF 75 75 10nF SDI
0 50 100 150 200 250 300 350 400 450 500
SDI GS9024
0
37.5 75
CABLE LENGTH (m)
Fig. 12 5.2. High Speed Outputs (SDO/SDO)
Fig. 11 3. CARRIER DETECT THRESHOLD ADJUST
The threshold level at which loss of carrier is detected is adjustable via external resistors at the CD_ADJ pin. The control voltage at the CD_ADJ pin is set by a simple resistor divider circuit. The threshold level is adjustable from 200m to 350m. By default (no external resistors), the threshold is typically 320m. Connecting this pin to Ground disables the SDO/SDO muting function and allows for maximum possible cable length equalization. This feature is designed for use in applications such as routers where signal crosstalk and circuit noise cause the equalizer to output erroneous data when no input signal is present. This problem is not solved by using a Carrier Detect function with a fixed internal reference because the signal to noise ratio on the circuit board may be significantly less than the default signal detection level set by the onchip reference. To solve this problem, the GS9024 provides a user adjustable threshold to meet the unique conditions that exist in each user's application. Override and internal default settings are provided to give the user total flexibility.
4. OUTPUT EYE MONITOR
SDO/SDO are current mode outputs that require external pullups (see Figure 13). The output signal swings are 800mV when 75 resistors are used. A diode can be placed between VCC and the pullups to shift the signal levels down by approximately 0.7 volts. When the output traces are longer than 1 inch, controlled impedance traces should be used. The pullup resistors should be placed at the end of the output traces as they terminate the trace in its characteristic impedance (75).
VCC
75 GS9024 SDO SDO
75
Fig. 13
The GS9024 provides an 'Output Eye Monitor' (OEM) which allows the verification of signal integrity after equalization, prior to reslicing. The OEM pin is an open collector current output that requires an external 50 pullup resistor. When the pullup resistor is not used, the OEM block is disabled and the internal OEM circuit is powered down. The OEM provides a 0.25Vp-p signal when driving a 50 oscilloscope input.
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TYPICAL APPLICATION CIRCUIT
100nF VCC VCC
VCC
1 AGC2 3 VEE VCC SDI 5 75 10n VCC SDI 6 7 VEE VCC SDO CD_ADJ OEM GS9024 HIGH Z AGC+
14 13 12 SSI/CD SDO 11 10 9 8
SDI INPUT 30 - 622Mb/s 75 37.5 75
75
75
GS9024
10n 4
DATA OUT DATA OUT VCC 100k POT (optional) 1n EYE MONITOR OUTPUT
All resistors in ohms, all capacitors in farads, unless otherwise shown.
50
PACKAGE DIMENSIONS
All dimensions in millimeters.
8.75 MAX 0.49 MAX 1.91 MAX
1.27 MAX
14
8 4.0 MAX 6.20 MAX 0.25 MAX
1
7 0.25 MAX
O.56 MAX
=
=
=
=
=
=
7.62 0.05 6 spaces@ 1.270.05
16 Pin SOIC Narrow
CAUTION
ELECTROSTATIC SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION
DOCUMENT IDENTIFICATION
DATA SHEET The product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible.
REVISION NOTES:
Clarified symbols for pin numbers 10 and 11; Changed SSI/CD to SSI/CD.
For latest product information, visit www.gennum.com
GENNUM JAPAN CORPORATION C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168-0081, Japan Tel. +81 (03) 3334-7700 Fax. +81 (03) 3247-8839 GENNUM UK LIMITED 25 Long Garden Walk, Farnham, Surrey, England GU9 7HX Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523
GENNUM CORPORATION
MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. (c) Copyright April 1996 Gennum Corporation. All rights reserved. Printed in Canada.
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